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The present invention relates to motor controllers and more particularly, to a method and an apparatus for altering stator winding voltages to eliminate greater than twice over voltage as a function of modulating wave angle.
Many motor applications require that a motor be driven at various speeds. Motor speed can be adjusted with an Adjustable Speed Drive (ASD) which is placed between a voltage source and an associated motor that can excite the motor at various frequencies. One commonly used type of ASD uses a three-phase Pulse Width Modulated (PWM) inverter and associated PWM controller which can control both voltage and frequency of signals that eventually reach motor stator windings.
A three-phase PWM controller receives three reference or modulating signals and a triangle carrier signal, compares each modulating signal to the carrier signal and generates firing signals consisting of a plurality of pulses corresponding to each modulating signal. When a modulating signal has a greater instantaneous amplitude than the carrier signal, a corresponding firing signal is high producing a pulse on-time. When a modulating signal has an instantaneous amplitude that is less than the carrier signal, a corresponding firing signal is low producing a pulse off-time.
The firing signals are used to control the PWM inverter. A three-phase PWM inverter consists of three pairs of switches, each switch pair including series arranged upper and lower switches configured between positive and negative DC power supplies. Each pair of switches is linked to a unique motor terminal by a unique supply line, each supply line is connected to a node between an associated pair of switches. Each firing signal controls an associated switch pair to alternately connect a stator winding between the positive and negative DC power supplies to produce a series of high frequency voltage pulses that resemble the firing signals. A changing average of the high frequency voltage pulses over a period defines a fundamental low frequency alternating line-to-line voltage between motor terminals that drives the motor.
Insulated Gate Bipolar Transistors (IGBTs) are the latest power semiconductor switches used in the PWM inverter, IGBTs have fast rise times and associated switching speeds (e.g. 50-400 ns) that are at least an order of magnitude faster than BJTs and other similar devices. At IGBT switching speeds, switching frequency and efficiency, and the quality of terminal voltages, are all appreciably improved. In addition, the faster switching speeds reduce harmonic heating of the motor winding as well as reduce audible motor lamination noise.
While IGBT PWMs are advantageous for all of the reasons identified above, when combined with certain switch modulating techniques (i.e. certain on/off switching sequences), IGBT fast dv/dt or rise times can reduce the useful life of motor components and/or drive to motor voltage supply lines. In particular, while most motors and supply lines are designed to withstand operation at rated line voltages for long periods and to withstand predictable overvoltage levels for short periods, in many cases, fast switch rise times causes over voltages that exceed design levels.
For a long time the industry has recognized and configured control systems to deal with twice overvoltage (i.e. twice the PWM inverter DC power supply level) problems. As well known in the controls art, twice overvoltage levels are caused by various combinations of line voltage rise time and magnitude, imperfect matches between line-to-line supply cable and motor surge impedances, and cable length. Line voltage frequency and switch modulating techniques have little effect on twice overvoltage levels.
One common way to cope with twice overvoltage levels has been to reduce reflected voltage by terminating the cable supply lines at the motor terminals with a cable to motor surge impedance matching network. Resistor-Inductor-Capacitor or R-L-C filter networks mounted at the drive output are also used to change and reduce the slope of the voltage pulses (i.e. the turn on times) as they arrive. This network increases the cable distance where twice voltage in the motor terminals is developed to a length outside the application distance of interest. In addition, to reduce the possibility of damage from periodic twice overvoltage levels, most cable supply lines and motors are insulated to withstand periodic twice overvoltage levels. Thus, the industry has developed different system configurations for dealing with twice overvoltage.
Unfortunately, there is another potentially more damaging overvoltage problem that has not been satisfactorily dealt with. The second overvoltage problem is referred to herein as greater than twice overvoltage. Unlike twice overvoltage, greater than twice overvoltage is caused by faster IGBT switching frequencies and faster IGBT dv/dt rise times interacting with two different common switch modulating techniques, that result in overvoltage problems referred to as xe2x80x9cdouble pulsingxe2x80x9d and xe2x80x9cpolarity reversalxe2x80x9d.
Referring to FIG. 1, double pulsing will be described in the context of an IGBT inverter generated line-to-line voltage Vi applied to a line cable and a resulting motor line-to-line terminal voltage Vm. Initially, at time T1, the line is shown in a fully-charged condition (Vi(T1)=Vm(T1)=VDC). A transient motor voltage disturbance is initiated in FIG. 1 by discharging the line at the inverter output to zero voltage, starting at time T2, for approximately 4 xcexcsec. The pulse propagation delay between the inverter terminals and motor terminals is proportional to cable length and is approximately 1 xcexcsec for the assumed conditions. At time T3, 1 xcexcsec after time T2, a negative going VDC voltage has propagated to the motor terminals. In this example, a motor terminal reflection coefficient ┌m is nearly unity. Thus, the motor reflects the incoming negative voltage and forces the terminal voltage Vm to approximately negative bus voltage:
xe2x80x83Vm(T3)=Vm(T1)xe2x88x92VDC(1+┌m)≈xe2x88x92VDCxe2x80x83xe2x80x83Eq. 1
A reflected wave (xe2x88x92VDC) travels from the motor to the inverter in 1 xcexcsec and is immediately reflected back toward the motor. Where an inverter reflection coefficient ┌i is approximately negative unity, a positive VDC pulse is reflected back toward the motor at time T4. Therefore, at time T4 the discharge at time T2 alone causes a voltage at the motor terminal such that:
Vm(T4)=Vm(T1)xe2x88x92VDC(1+┌m)xe2x88x92VDC┌i┌m(1+┌m)≈VDCxe2x80x83xe2x80x83Eq. 2
In addition, at time T4, with the motor potential approaching VDC due to the T2 discharge, the inverter pulse Vi(T4) arrives and itself recharges the motor terminal voltage to VDC. Pulse Vi(T4) is reflected by the motor and combines with Vm(T4) to achieve a peak value of approximately three times the DC rail value:
Vm(T4+)=Vm(T1)xe2x88x92VDC(1+┌m)xe2x88x92VDC┌i┌m(1+┌m)+Vi(T4)(1+┌m)≈3VDCxe2x80x83xe2x80x83Eq. 3
Referring to FIG. 2 polarity reversal will be described in the context of an IGBT inverter generated line-to-line voltage Vil, and a resulting motor line-to-line voltage Vml. Polarity reversal occurs when the firing signal of one supply line is transitioning into overmodulation while the firing signal of another supply line is simultaneously transitioning out of overmodulation. Overmodulation occurs when a reference signal magnitude is greater than the maximum carrier signal magnitude so that the on-time or off-time of a switch is equal to the duration of the carrier period. Polarity reversal is common in all types of PWM inverter control.
Initially, the inverter line-to-line voltage Vil(T5) is zero volts. At time T6, the inverter voltage Vil(T6) is increased to VDC and, after a short propagation period, a VDC pulse is received and reflected at the motor terminals thus generating a 2VDC pulse across associated motor lines. At time T7, the line-to-line voltage switches polarity (hence the term polarity reversal) so that the inverter voltage Vil(T7) is equal to xe2x88x92VDC when the line-to-line motor voltage Vml(T7) has not yet dampened out to a DC value (i.e. may in fact be 2VDC). After a short propagation period, the xe2x88x92VDC inverter pulse reaches the motor, reflects, and combines with the inverter reflected pulsexe2x88x92VDC and the positive voltage 2VDC on the motor. The combination generates an approximately xe2x88x923VDC line-to-line motor voltage Vml(T8) at time T8.
In reality, the amplitude of overvoltages will often be less than described above due to a number of system variables including line AC resistance damping characteristics, DC power supply level, pulse dwell time, carrier frequency fc modulation techniques, and less than unity reflection coefficients (┌m).
One solution to the double pulsing problem has been to increase the zero voltage dwell time between line-to-line inverter pulses. In other words, referring again to FIG. 1, the discharge time between pulses would be extended from the present 4 xcexcsecs so that, prior to the second pulse Vi(T4) reaching the motor terminals, the motor terminal voltage transient Vm reaches a steady state DC value.
While increasing the zero voltage dwell time between line-to-line inverter pulses eliminates greater than twice overvoltage due to double pulsing, this solution can disadvantageously reduce the amplitude of the resulting fundamental low frequency terminal voltage where high carrier frequencies and overmodulation occurs. For example, referring to FIG. 3, a series of high frequency voltage pulses 5 at a motor terminal and a resulting fundamental low frequency terminal voltage 6 can be observed. In FIG. 3, a positive phase of the low frequency voltage begins at xcfx849 and ends at xcfx8410.
To eliminate greater than twice over voltage, one pulse limiting scheme indiscriminately increases the duration of each off time period that is less than a minimum allowable off time. In FIG. 3, the off times of pulses during the overmodulation period (i.e., xcex61-xcex64) are equal to associated carrier periods and therefore are greater than the maximum on time and thus all would be limited. In addition, in many cases greater than twice over voltage will occur prior to and just after overmodulation. Thus, referring still to FIG. 3, during periods just before period xcex61, and just after period xcex64, off times will also often be limited. Where the magnitude of the DC power supply is reduced substantially, the number of overmodulation carrier periods having limited on-times increases proportionally until, at some point, the reduced on-time noticeably affects the low frequency terminal voltage magnitude. In other words, maximum power output is substantially reduced through blind limitation of firing pulses during overmodulation.
While FIG. 3 is only exemplary, it can be seen that during the positive phase (i.e. T9-T10) the four firing pulses that would normally occur during carrier periods xcex61-xcex64 would all be limited to a maximum on-time according to prior art methods of reducing greater than twice overvoltage. In addition, pulses during periods just before period xcex61 and just after period xcex64 may also be limited. In many cases, especially where the DC supply magnitude is minimal or reduced, the reduction in low frequency terminal voltage is unacceptable.
In addition to reducing the magnitude of the fundamental low frequency voltage 6, this solution does not address the polarity reversal problem.
Another solution to the greater than twice overvoltage problem is described in U.S. Pat. No. 5,671,130 entitled METHOD AND APPARATUS FOR CONTROLLING VOLTAGE REFLECTIONS USING A MOTOR CONTROLLER which was issued on Sep. 23, 1997 and is commonly owned with this application. According to this solution a motor controller modifies firing pulses that are provided to an inverter in a manner calculated to eliminate greater than twice overvoltage switching sequences. When the period between two voltage changes is less than the period required for a substantially steady state voltage near zero to be reached, the period between the two changes is increased. Where overmodulation switching sequences result in greater than twice overvoltage due to polarity reversal, the overmodulation switching sequence is altered to eliminate the possibility of greater than twice overvoltage.
This solution contemplates two different methods of altering the switching sequence referred to as the Maximum-Minimum Pulse Technique (MMPT) and the Pulse Elimination Technique (PET) methods. According to the MMPT method, when a PWM pulse has characteristics which could generate greater than twice overvoltage, the pulse width is altered so that its duration is set equal to or between the minimum and maximum pulse times allowed. Importantly, only pulses that cross the threshold level for double pulsing induced motor voltages greater than twice overvoltage and during polarity reversal periods are altered so that the resulting terminal voltage magnitude is only minimally effected. Nevertheless, the terminal voltage magnitude is noticeably reduced as some positive pulse durations during positive half cycles and some negative pulse durations during negative half cycles are reduced when the MMPT method is employed.
According to the PET method, instead of only limiting pulses to within the maximum and minimum pulse times, some of the pulses having characteristics that could generate greater than twice overvoltage are eliminated. In other words, some of the positive pulse durations during positive half cycles are increased and set equal to the carrier period and some of the negative pulse durations are increased and set equal to the carrier period which tend to offset the reduced pulse durations. The result is a terminal voltage magnitude which is essentially unaffected by pulse alterations.
While this solution effectively eliminates greater than twice overvoltage while maintaining a desired terminal voltage, this solution requires a relatively large amount of signal monitoring and comparing to determine which PWM pulses are likely to generate greater than twice overvoltage. For this reason, it may be difficult to implement this solution using the simple microprocessors which are provided in many motor controllers.
Another solution is described in U.S. Pat. No. 5,912,813 (herein after xe2x80x9cthe ""813 patentxe2x80x9d) which is also entitled METHOD AND APPARATUS FOR CONTROLLING VOLTAGE REFLECTIONS USING A MOTOR CONTROLLER which was filed on Oct. 1, 1997 and is commonly owned with this application. The ""813 patent teaches a system that modifies the PWM modulating waveforms in ways that reflect the PET and MMPT methods in an effort to reduce reflected wave overvoltage transients. To determine how to modify the modulating waveforms, the ""813 patent first identifies a maximum waveform voltage value Vmv (in the ""812 patent Vxe2x80x2Txcex1) above which greater than twice overvoltage is known to occur by mathematically combining a DC bus voltage magnitude, a carrier period signal and a known dwell time value (i.e., duration required for transients to settle to acceptable levels after switching). Thereafter, the ""813 patent teaches that the modulating signal is compared to the maximum voltage value Vmv, and, when the modulating signal magnitude exceeds the maximum voltage value Vmv, the modulating signal is modified by either clamping the modulating signal value to the maximum positive or negative voltage value Vmv or by clamping the modulating signal to one of the DC buses, depending on modulating signal polarity and magnitude. More specifically, where the periods during which the modulating signal value exceeds the maximum voltage value are overvoltage periods, during the first and last N carrier cycle periods of each overvoltage period, the ""813 patent teaches that the modulating signal magnitude is clamped to the maximum voltage magnitude value and, there between, the modulating signal is clamped to one of the DC buses. Each portion of the modulating signals that occurs during the N carrier cycles is generally referred to as xe2x80x9cporchxe2x80x9d.
Unfortunately, even systems of the type described in the ""813 patent have some inherent limitations. For instance, the ""813 methods are generally limited by the ability of embedded controllers used to identify and compare high resolution voltages. This is particularly true regarding the steps that require determining when the modulating waveform xe2x80x9cpasses throughxe2x80x9d the maximum voltage magnitude value where errors have been known to occur. Errors in the voltage resolution cause line current distortions as the modulator goes into and out of PET operation. As well known in the industry, any current distortions cause torque pulsations, harmonic losses and sampling distortions and adversely affect voltage-frequency drive stability.
Therefore, it would be advantageous to have a method and apparatus that could eliminate greater than twice overvoltage without causing excessive current distortions and which is relatively simple to implement.
It has been recognized that, instead of trying to precisely identify all of the times at which the modulating waveforms equal or pass through the maximum voltage magnitude value and adjusting the modulating waveforms accordingly, better and easier to implement results can be obtained by symmetrically altering the modulating waveform as a function of a modulating waveform angle. The modulating waveform angle can be easily tracked and predetermined symmetric modulating waveform angles can be identified so that, upon sensing the angle herein referred to as a pass through angle) at which a modulating waveform first equals the maximum voltage magnitude value during a cycle, waveform modifications for the entire waveform cycle can be determined. More specifically, the first pass through angle during a modulating waveform cycle can be used to identify all other pass through angles during the cycle. Thereafter the modulating waveform is modified to include porches at each pass through angle and to clamp the waveform to the positive or negative DC buses during other waveform segments thereby generating modified modulating waveforms that will not cause greater than twice overvoltage on the load lines.
To this end the invention includes a method to be used with a motor controller including a signal generator, a PWM controller and an inverter, the generator providing modulating waveforms to the PWM controller which compares the modulating waveforms with a carrier signal to generate firing pulses which control the inverter, the inverter providing exciting voltage to a motor corresponding to the firing pulses, the voltage having a maximum intended amplitude, the method for substantially eliminating greater than twice motor overvoltage by modifying the modulating waveforms to provide modified modulating waveforms. The method comprises the steps of, for each modulating waveform, determining a maximum voltage magnitude of the modulating waveform above which greater than twice motor overvoltage is known to occur, comparing the modulating waveform to the maximum voltage magnitude, when the modulating waveform magnitude equals the maximum voltage magnitude, identifying the modulating waveform angle as a first pass through angle, using the first pass through angle to identify at least one subsequent pass through angle at which the modulating waveform should equal the maximum voltage magnitude and modifying the modulating waveform as a function of the first and at least one subsequent pass through angles thereby providing a modified waveform having characteristics which do not cause greater than twice overvoltage.
In one embodiment the modulating waveform occurs over a 2xcfx80 period, the inverter generates the firing pulses by alternately connecting motor phases between positive and negative DC buses, during each half cycle of the modulating waveform, the modulating waveform magnitude is greater than the maximum voltage magnitude during an overvoltage period, xcfx86H is a porch angle corresponding to N carrier signal periods and is set by a controller operator, the step of identifying the modulating waveform angle includes the step of identifying the angle at which the modulating waveform passes through the maximum magnitude value after the waveform passes from a negative value through zero to a positive value and, the step of using the pass through angle to identify at least one subsequent pass through angle includes the step of identifying a fourth angle as xcfx80 less the first pass through angle. Here, the step of modifying includes the steps of identifying a second angle as the first pass through angle plus porch angle xcfx86H, a third angle as xcfx80 less the sum of (the first pass through angle and the porch angle xcfx86H) and, during the 2xcfx80 modulating waveform segment following the first pass through angle (i) setting the modulating waveform equal to the positive maximum voltage magnitude between the first and second angles and between the third and fourth angles and (ii) setting the modulating waveform equal to the negative maximum voltage magnitude between the first angle plus xcfx80 and second angle plus xcfx80 and between the third angle plus a and fourth angle plus xcfx80.
The step of modifying may further include the steps of setting the modulating waveform equal to the positive DC bus value between the second and third angles and setting the modulating waveform equal to the negative DC bus value between the second angle plus xcfx80 and the third angle plus xcfx80.
The step of modifying may further include the steps of determining if the modulating waveform is a uni-arc waveform (i.e., a waveform having a positive half cycle that increases in magnitude from zero to a maximum waveform amplitude and then decreases in magnitude to the next zero value) or a bi-arc waveform (i.e., a waveform having a positive half cycle that increases in value from zero to a maximum waveform amplitude, decreases to an intermediate value greater than zero, increases from the intermediate value up to a second maximum amplitude and then decreases from the second maximum amplitude to the next zero value) and, if the modulating waveform is a bi-arc waveform, comparing the modulating angle to a threshold angle and, where the modulating angle is greater than the threshold angle, further modifying the modulating waveform.
Thus, it has also been recognized that, when the modulating waveform is a bi-arc waveform and the first pass through angle is less than a threshold angle, the modulating waveform will pass through the maximum magnitude value more than twice during each half (i.e., positive or negative) of the waveform cycle and therefore additional modifications have to be made to eliminate greater than twice overvoltage conditions. The threshold angle is typically xcfx80/6.
Where the first pass through angle is less than the threshold angle the step of further modifying may include the steps of identifying a fifth angle as 2xcfx80/3 less the sum of (the first pass through angle and the porch angle xcfx86H), identifying a sixth angle as 2xcfx80/3 less the first pass through angle, identifying a seventh angle as xcfx80/3 plus the first pass through angle and identifying an eighth angle as xcfx80/3 plus the sum of (the first pass through angle and the porch angle xcfx86H). during the 2xcfx80 modulating waveform segment following the first pass through angle (i) setting the modulating waveform equal to the positive maximum voltage magnitude between the fifth and sixth angles and between the seventh and eighth angles and (ii) setting the modulating waveform equal to the negative maximum voltage magnitude between the fifth angle plus xcfx80 and sixth angle plus xcfx80 and between the seventh angle plus xcfx80 and eighth angle plus xcfx80.
Moreover, where the first pass through angle is less than the threshold angle the step of modifying may further include the steps of, setting the modulating waveform equal to the positive DC bus value between the second and fifth angles and between the eighth and third angles and setting the modulating waveform equal to the negative DC bus value between the second angle plus xcfx80 and fifth angle plus xcfx80 and between the eighth angle plus xcfx80 and third angle plus xcfx80.
Furthermore, the step of modifying may also include the steps of, when the first pass through angle is less than or equal to the threshold angle, setting the modulating waveform equal to the positive DC bus value between the second and third angles and setting the modulating waveform equal to the negative DC bus value between the second angle plus xcfx80 and third angle plus xcfx80.
The method may include repeating the steps described above every 2xcfx80 segment of the modulating waveform.
The invention further includes an apparatus for performing the methods described above. More specifically, the may include hardware specifically configured to perform the methods described above or, in the alternative, may include a processor running a pulse sequencing program to perform the methods described above.
Thus, it should be appreciated that an extremely simple and accurate method and apparatus for modifying any type (i.e., uni-arc or bi-arc) of modulating waveform has been described herein where the resulting waveform will not cause greater than twice overvoltage.
These and other objects, advantages and aspects of the invention will become apparent from the following description. In the description, reference is made to the accompanying drawings which form a part hereof, and in which there is shown a preferred embodiment of the invention. Such embodiment does not necessarily represent the full scope of the invention and reference is made therefore, to the claims herein for interpreting the scope of the invention.